course: Image processing on FPGAs

number:
141141
teaching methods:
lecture with integrated lab excercises
media:
computer based presentation
responsible person:
Prof. Dr.-Ing. Michael Hübner
lecturer:
Prof. Donald Bailey (extern)
language:
english
HWS:
2
CP:
2
offered in:
summer term

dates in summer term

  • lecture: Monday the 12.06.2017 from 10:00 to 13.00 o'clock in ID 1/103
  • lecture: Tuesday the 13.06.2017 from 10:00 to 13.00 o'clock in ID 1/103
  • lecture: Wednesday the 14.06.2017 from 14:00 to 17.00 o'clock in ID 1/103
  • lecture: Monday the 19.06.2017 from 10:00 to 13.00 o'clock in ID 1/103
  • lecture: Tuesday the 20.06.2017 from 10:00 to 13.00 o'clock in ID 1/103
  • lecture: Wednesday the 21.06.2017 from 14:00 to 17.00 o'clock in ID 1/103
  • lecture: Monday the 26.06.2017 from 10:00 to 13.00 o'clock in ID 1/103
  • lecture: Tuesday the 27.06.2017 from 10:00 to 13.00 o'clock in ID 1/103
  • lecture: Wednesday the 28.06.2017 from 14:00 to 17.00 o'clock in ID 1/103
  • lecture: Thursday the 29.06.2017 from 14:00 to 17.00 o'clock in ID 1/103
  • lecture: Monday the 03.07.2017 from 10:00 to 13.00 o'clock in ID 1/103
  • lecture: Tuesday the 04.07.2017 from 10:00 to 13.00 o'clock in ID 1/103

Exam

Oral

Date according to prior agreement with lecturer.

Duration: 30min

goals

FPGAs as embedded systems; Register transfer level design using VHDL; Efficiently exploiting parallelism for implementing image processing algorithms; Implementation of basic image processing operations: camera control and image capture, point operations and colour, Bayer interpolation, histogram processing, linear and non-linear filters, geometric transformation, connected components processing, fast Fourier transform, JPEG based image coding.

content

FPGAs are increasingly being used as an implementation platform for real-time image processing applications because their structure is able to exploit spatial and temporal parallelism. Unfortunately, simply porting an algorithm onto an FPGA often gives disappointing results, because most image processing algorithms have been optimised for a serial processor. Therefore it is necessary to transform the algorithm to efficiently exploit the parallelism inherent within the algorithm. This course introduces a design approach for FPGA based imaging system development, highlighting the significant differences between hardware and software based design. While prior experience in image processing or FPGA based design is not essential, it would be helpful. The course will cover both the theory, and also provide practical hands on experience in applying FPGAs to implementing image processing algorithms. At the end of the course, participants should be familiar with the principles of efficient FPGA based design of image processing operations, and be in a position to begin using FPGAs within a range of image processing projects.

requirements

xxx

recommended knowledge

none